We will provide one example for the reader to familiarize with the
DQDB protocol. This example will be presented in the "traditional" form
of a textual explanation with some figures. The applet will provide
interaction with the user.
The following example shows a step by step explanation of how the request
and busy bits are set in a slot. In the following diagrams, a
slot is represented by a green box with three fields: REQ bits, BUSY bit,
and payload. An arrow indicates the direction of travel of the slot. A
host is represented by a box with the number of the host and the RQ and CD
counters with the current state.
Note: In this example, hosts 4 and 2 want to transmit to another
host that is located on the right side. Therefore, both 4 and 2 will use
BUS A as the forward bus and BUS B as the reverse bus. Should they want to
transmit to the left, they would use BUS B as the forward bus and BUS A as
the reverse bus.
First, host 4 will make a request for transmission. Then host 2 will make
a request, and will get queued for transmission. Once both hosts are
queued, the next empty slot that passes on the forward bus will be used by
the first host queued (4) and the next one by the next host in the queue
(2). Let us review this process step by step:
First Request by Host 4
STEP 1:
The red dot next to host 4 indicates that this is the host that is trying to
transmit now. In Figure 4.1 we can see that a slot is passing from right to
left on the reverse bus. At this point is has not passed by host number 4
yet. Therefore, the request bit is clear (0). The busy bit is not shown
because it is not part of this example. The payload part of the slot is
also empty.
In this figure it can also be seen that all hosts have the request counters
set to zero, because there are no requests made previous to this example.
Figure 4.1. Situation before host 4 requests transmission.
STEP 2:
Next, in Figure 4.2, the slot has passed by host 4. Host number 4 saw that
the request bit in this slot was empty, and since host 4 wanted to transmit,
it sets the request bit in this slot, to request a transmission. The dashed
line represents the fact that this slot has been set by host number 4. In
this diagram it can also be noted that host 4 has now a countdown (CD)
counter set to zero. When a host sets the request bit in the slot, it means
that it is now queued for transmission. In addition to this, the host has
to dump the current RQ counter into a CD counter. In this case, the RQ
counter for host 4 was zero, so the CD counter is also zero. This means
that when an empty slot passes by the forward bus (BUS A), this will be the
first host to gain access to that slot, because its countdown counter has
already reached zero.
Figure 4.2. Host 4 is now queued for transmission.
STEP 3:
In Figure 4.3 the slot keeps traveling towards the left, and it passes by
host number 3. Host number 3 sees that the Req bit in the slot is set to 1.
This implies that there is a host downstream (towards the right) that wants
to transmit and has already been queued for transmission. Therefore, host
number 3 must increase its own RQ counter, to keep track of how many hosts
are currently queued.
Figure 4.3. Host 3 sees the request bit in the slot.
STEP 4:
Figure 4.4 shows the state of hosts 2 and 1 after the slot has passed by
them as well. Their RQ counters have increased by one for the same reason
that the RQ counter of host 3 did.
Figure 4.4. Hosts 2 and 1 are aware of a request that occurred downstream
Second Request by Host 2
The red dot is now next to host 2 indicating this is the host that is trying
to transmit now.
STEP 5:
In figure 4.5 we can first see that a new empty slot is passing on the
reverse bus.
Figure 4.5. New empty slot coming through.
STEP 6:
Now host 2 sees that there is an empty slot in the bus. Since host 2 wants
to transmit, it sets the request bit in this slot. In doing so, host 2 has
to copy the RQ counter into the CD counter and reset the RQ counter.
Therefore, we see that the RQ counter is now 0 and the CD counter is 1 for
host 2. In addition to this, the slot has passed by host 1 too and host 1
has seen that the req bit is set. Consequently, host 1 increments its RQ
counter and is now RQ=2.
Figure 4.6. Second slot taken by host 2
First Granted Request
In the following diagrams, the yellow dot next to a host indicates that this
is the host that is going to gain the access to the empty slot. Now an
empty slot will pass on the forward bus. This is the bus used to transmit
data. In this case it is BUS A. An empty slot will be taken by the host
that has a countdown (CD) counter of zero. In our example, this is host 4.
The only other host queued for transmission is host 2, but it has a
countdown of 1, because host 4 was queued first.
STEP 7:
A new empty slot comes from the left on the forward bus. This is seen in
figure 4.7.
Figure 4.7. A new empty slot appears in BUS A (forward bus).
STEP 8:
In Figure 4.8 we can see that the slot has passed by hosts 1 and 2. When
passing by host 1, this host decremented its RQ counter. When the slot
passed by host 2, host 2 decremented its CD counter, because host 2 knows
that there must be another host upstream that currently has a counter of
zero and will gain the slot this time. Therefore, host 2 will be ready to
transmit next time and for this reason it decrements its CD counter so that
the slot will see that host 2 has a zero CD counter next time.
Figure 4.8. Empty slot passes by hosts 1 and 2.
STEP 9:
In Figure 4.9 it can be seen that the slot has passed already by host 3,
causing this host to decrement its RQ counter. The slot has also passed by
host 4, which had a zero CD counter before. Now host 4 has set the BUSY bit
in this slot and has put its payload in the slot (represented by the X).
Figure 4.8. Empty slot passes by hosts 3 and 4.
Second Granted Request
STEP 10:
Figures 4.10 and 4.11 show that a new slot appears on the forward bus. It
passes by host 1 and makes it decrement its RQ counter (so it is now zero,
after the state in Figure 4.11)
Figure 4.10. New empty slot on the forward bus.
Figure 4.11. Slot passed by host 1.
STEP 11:
Now the slot passes by host 2, which has a countdown counter equal to zero.
Because of this, host 2 takes the empty slot, marks the BUSY bit and puts
its data into the payload field of the slot.
Figure 4.12. Host 2 takes control of the empty slot.
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